1. Field of the Invention
With LSI mini-scale technology development, a huge number of digital gates can be put into one LSI. Traditional circuit diagram design is regarded as time consuming especially for design and simulation. Therefore, it is desirable to have highly abstracted high level description languages. This invention is related to a digital circuit design method with which, after using program language to describe digital circuit, the source lists can be converted into hardware language, net lists or circuit diagram. This invention also introduces a compiler which can realize the above conversion; that is after the source lists being executed by computer, the simulator shows the results.
2. Description of the Prior Art
In traditional digital circuit design the hardware languages, such as the verilog-HDL or VHDL, are used. Since the circuit scale is becoming large, it is difficult to handle the whole system design and to use top-down design (i.e. specification) method to synthesize circuit by using hardware description languages. And also its simulation speed is slow.
Recently, programming languages such as C or C++ are adopted to design hardware, and for example C++ library called SystemC is introduced. Through C++ simulator it can solve the slow simulation problem caused by using hardware description language. However, this method has many limitations and the way of description is the same as the hardware description language. It is also hard to use top-down specification method to design digital circuit.
Although there are some other methods allowing the programming languages such as C or C++ to design hardware, their designs have limitations as well. Because In hardware description language, registers can change states within the same time step, but in procedural programming languages that use sequential process, it is difficult to describe changes occurring at the same time step.
In conclusion traditional compilers that transform programming language to hardware description language have the above-mentioned design limitations, and the simulator can only simulate those source lists created by restricted process.
The problem we want to solve is that, by using programming language such as C or C++, it is very difficult to describe register changes that occur at the same time. And because it requires sequential process, design is limited.
The key point for this design invention is that, when using programming language to describe register, it describes primary variables and secondary variables that express input of the register separately; after module process, assigns secondary variables to primary variables. To reduce the limitations caused by sequential process required by programming language, a assignment section which defines combination circuits for module section is executed before the module section. Several clocks, gated clocks and asynchronous resets/sets are described in a non-blocking assignment section.
This invention leads to a simple design by solving problems caused by programming language such as C or C++ when describing the hardware, and it also provides correlated compiler and simulator.